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  • 2:31 PM, Saturday, 08 Aug 2020

Course Postgraduate
Semester Sem. II
Subject Code AVM622
Subject Title Micro/Nano Fabrication Technology


Classical scaling in CMOS, Moore’s Law, Clean room concept, Material properties,
crystal structure, lattice, Growth of single crystal Si, Cleaning and etching, Thermal
oxidation, Dopant diffusion in silicon, Deposition & Growth (PVD, CVD, ALD,
epitaxy, MBE, ALCVD etc.),Ion-implantation, Lithography (Photolithography, EUV
lithography, X-ray lithography, e-beam lithography etc.), Etch and Cleaning, CMOS
Process integration, Back end of line processes (Copper damascene process, Metal
interconnects; Multi-level metallization schemes), Advanced technologies(SOI
MOSFETs, Strained Si, Silicon-Germanium MOS, metal semiconductor source /
drain junctions, High K, metal gate electrodes and work function engineering,
Double gate MOSFETs, FinFETs, TunnelFETsetc..) , emerging research devices and
architectures (Nanowire FETs, CNT FETs, Graphene transistors, Organic FETs etc..)

Text Books

Same as Reference


1. James Plummer, M. Deal and P.Griffin, Silicon VLSI Technology, Prentice Hall Electronics
2. Stephen Campbell, The Science and Engineering of Microelectronics, Oxford University Press, 1996
3. S.M. Sze (Ed), VLSI Technology, 2nd Edition, McGraw Hill, 1988
4. C.Y. Chang and S.M.Sze (Ed), ULSI Technology, McGraw Hill Companies Inc, 1996.
Peer reviewed international journals such as IEEE Electronic Device Letters,
Transactions on Electron Devices, Journal o Microelectronics, etc and conference
proceedings such as International Electron Device Meeting (IEDM), IRPS etc.