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  • 9:14 PM, Friday, 22 Oct 2021


Course Postgraduate
Semester Sem. II
Subject Code AVD622
Subject Title DSP System Design

Syllabus

Computational characteristics of DSP algorithms and applications; Architectural requirement of DSPs: high throughput, low cost, low power, small code size, embedded applications. Numerical representation of signals-word length effect and its impact. Carry free adders, Multiplier. Representation of digital signal processing systems: block diagrams, signal flow graphs, data-flow graphs, dependence graphs; Techniques for enhancing computational throughput: parallelism and pipelining. Introduction, Basic Architectural Features, DSP Computational Building Blocks, Bus Architecture and Memory, Data Addressing Capabilities, Address Generation Unit, Programmability and Program Execution, Features for External Interfacing. VLIW architecture. Basic performance issue in pipelining, Simple implementation of MIPS, Instruction Level Parallelism, Dynamic Scheduling, Dynamic Hardware Prediction, Memory hierarchy.Study of FIxed point and floating point DSP architectures Analysis of basic DSP Architectures on programmable hardwares. Algorithms for FIR , IIR, Lattice filter structures, architectures for real and complex fast Fourier transforms, 1D/2D Convolutions, Winograd minimal filtering algorithm. FPGA: Architecture, different sub-systems, design flow for DSP system design, mapping of DSP alrorithms onto FPGA.

Examples of digital signal processing algorithms suitable for parallel architectures such as GPUs and multiGPUs. Interfacing: Introduction, Synchronous Serial Interface CODE, A CODEC Interface Circuit, ADC interface

Text Books

Same as Reference

References

1. Sen M Kuo, Woon Seng S Gan, Digital Signal Processors

2. Digital Signal Processing and Application with C6713 and C6416 DSK, Rulph Chassaing, Worcester Polytechnic Institute, A Wiley Interscience Publication

3. Architectures for Digital Signal Processing, Peter Pirsch John Weily, 2007

4. DSP Processor and Fundamentals: Architecture and Features. Phil Lapsley, JBier, AmitSohan, Edward A Lee; Wiley IEEE Press

5. K. K. Parhi - VLSI Digital Signal Processing Systems - Wiley - 1999